![]() As a PCB designer you place parts and route various paths and create planes so that the product has good power and signal integrity. Altium just checks connectivity exists or doesn't. for a problem like this, what you're looking at it a failure in the design process. set it up right, and it might possibly find that single via current path issue for you. Well, you could buy the PDN analyser plugin. (Possibly you can just flag all nets with it? I'm not sure if it removes overlapping vias properly in that case. In Altium, there is a tool to generate vias on a general grid, and around critical nets. Or you may discover instability in active circuits, because whether or not you're intending to use an op-amp at "just DC", the fact remains it's an active component with bandwidth into the MHz! Unfortunately there isn't a tool to automate optimal placement of stitching vias. But even then, just for DC, you may find a circuitous ground-return path drops an obnoxious amount of voltage, or blows out at high currents. But it's good practice to do so anyway, so that when you do have a board with high speed signals (including digital logic, microcontrollers and whatnot), you'll be prepared. ![]() Certainly, such precautions are not needed on every board if you're only doing DC and low frequency signals, it's probably not going to matter. A few in parallel should be used in critical areas, like around switching converters and RF circuits. ![]() Doesn't have to be utterly blanketed they can be every few cm or so in low density areas: along traces, in empty areas, around the board edge, etc. Particularly around ground pins, trace crossings, peninsulas, islands. The fix? Stuff it full of vias, tying top and bottom ground together frequently. The problem, is you've already failed - a ground pour so tenuous that you have to ask this question, is just begging to have EMI related issues. ![]()
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